Senior Verification Engineer

NextSilicon is looking for a talented and experienced engineer to take part in the verification efforts for the company’s core product.
At NextSilicon, we are reimagining high-performance computing. Our pioneering coprocessor vastly accelerates supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC to fulfill its promise of breakthroughs in all fields of advanced research.
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DESCRIPTION

 

NextSilicon is looking for a talented and experienced engineer to take part in the verification efforts for the company’s core product. This position involves building a complex verification environment from scratch, and defining and executing a test plan. In this role, you will be leading verification from A to Z and will have a critical impact on the company.

 

REQUIREMENTS

 

  • 6+ years of verification experience, including hands-on experience building complex environments from scratch
  • Advanced knowledge of verification flow and CPU and SOC architecture and design
  • Expertise in verification languages such as SystemVerilog, UVM, OVM, Specman
  • Knowledge of industry standard tools, including Verilog, Verilog simulator, and debug
  • Clear understanding of constrained random verification process, functional coverage, code coverage, and assertion methodology and philosophy
  • Experience with PCIe and DDR interfaces, Perl, Tcl, shell scripting, and Makefiles an advantage
  • Master’s degree in electrical engineering or computer science, or equivalent experience